The present invention generally relates to semiconductor devices, and more particularly to a semiconductor device having a plastic or resin encapsulated package structure.
Recently, the demands for further improved integration density and operation speed of semiconductor devices have increased. But as the integration density of the semiconductor device is increased, the number of leads increases. The effects of the lead inductance become a problem as the operation speed of the semiconductor device is increased. Accordingly, there are demands to realize a semiconductor device which can cope with both the increasing number of leads and the lead inductance.
FIG. 1 shows an example of a conventional semiconductor device. A semiconductor device 1 shown in FIG. 1 is the so-called quad flat package (QFP) type, and a semiconductor chip 3 is mounted on a stage 2 which is positioned at a central part of the semiconductor device 1. The semiconductor chip 3 and leads 4 are electrically connected by wires 5 which wire-bond inner leads 4a of the leads 4 to the semiconductor chip 3. The semiconductor chip 3 and the inner leads 4a are resin-encapsulated by a resin package 6. Furthermore, outer leads 4b of the leads 4 extend outside the resin package 6 and are bent in a gull-wing shape so as to facilitate surface mounting of the semiconductor device 1.
The semiconductor chip 3 of the semiconductor device 1 having the construction described above has a high integration density and is used as an application specific integrated circuit (ASIC), for example. For this reason, the number of the leads 4 exceeds 300, for example. In addition, the switching speed of the semiconductor chip 3 is extremely high in order to realize a high-speed processing.
However, according to the semiconductor device 1, only the leads 4 are provided to electrically connect the semiconductor chip 3 to an external circuit substrate. Hence, as the integration density of the semiconductor chip 3 increases and the number of electrodes to be connected increases, the number of leads 4 inevitably increases considerably.
On the other hand, there are also demands to reduce the size of the semiconductor device 1 in order to improve the mounting efficiency thereof. For this reason, it is not possible to simply increase the size of the resin package in order to meet these demands. Accordingly, in order to cope with the increasing number of the leads 4, the size of each lead 4 itself must be reduced. However, if the size of each lead 4 is reduced, the inductance per lead 4 increases.
If the inductance of each lead 4 increases, the noise from the leads 4 becomes large, and even if the semiconductor chip 3 carries out a high-speed processing, the high-speed operation of the semiconductor device 1 as a whole is interfered with by the noise from the leads 4.
Therefore, according to the conventional semiconductor device 1, there is a problem in that it is impossible to realize both high-speed operation and high integration density.